Multinational Company / R&D Centre / Permanent Position / Hybrid work
Responsibilities
- VLSI component layout and translation of schematics into layout geometry
- Participate in module/chip floor planning, performing layout verification (such as LVS, DRC , Antenna & others) and troubleshooting the results.
- Extensive use of CAD tools (Cadence Virtuoso--VXL & Calibre) in chip assembly and verification
- Perform block level/full chip verification check and fixes
Skills and Qualifications
- Bachelor's Degree in Electrical/Electronics Engineering, Bachelor's Degree in Physics with VLSI exposure or equivalent
- with around5-12 years of job experience inlayout designfield is preferred.
- Excellent communication skills and good initiative at work.
- Possess strong analytical skills
- Ability to work with multiple groups as a team member.
- Knowledge inVLSI Layout Design, IO Layout Designand understanding of geometrical design rules will be an added advantage.
