Timing Closure Jobs

STA/PnR/InR/Synthesis Engineer

Permanent Job

Penang ,

Malaysia

4-6 years

tempus innovus ir analysis power switches power grid development dynamic ir ERC drc rtl2n multi-voltage Sta Synthesis static power/signal em calibre em Ir LVS Dfm Physical Verification multi-power domain PNR Esd Timing Closure irdrop Soc Clp Ant

a month ago

Design Enablement Testchip Physical Design Graduate Trainee

Permanent Job

Penang ,

Malaysia

0-2 years

physical design methodologies electrical rule checking formal equivalence verification Reliability physical clock design layout verification static and dynamic power integrity Dft EDA Tools product-level parameters Synthesis coverage analysis structural design checking optimizes design Place And Route power and noise analysis flow automation Floor Planning power/clock distribution Timing Closure multiple power domain analysis Clock Tree Synthesis static timing analysis Python Perl Tcl

5 months ago

Software Development Engineer

Permanent Job

Penang ,

Malaysia

8-10 years

FPGA tool Serdes interface FPGA RTL design testbench development FPGA architecture System Design Development Logic Verification Timing Closure C/C++ Memory DDR Perl Pcie Debugging Ethernet Python Tcl

5 months ago

E-core CPU Senior Physical Design Engineer

Permanent Job

Penang ,

Malaysia

0-8 years

APR flows primetime Noise Fusion Compiler cross-talk ICC2 Conformal Physical Design electro-migration checks Calibre Synthesis Layout physical design Formal equivalence redhawk Dce StarRCXT Ir DRC/LVS OCV analysis Timing Verification Timing Closure DCT ICV Cpu Soc Tcl Scripting

5 months ago

Physical Design Engineer

Permanent Job

Penang ,

Malaysia

5-7 years

Logic Synthesis Reliability RTL physical clock design Physical Design Dft ASIC Gds EDA Tools Structural Design automated place and route tools Synthesis coverage analysis VLSI circuits Place And Route power and noise analysis design techniques Logic equivalent verification debugging sub-micron CMOS technologies Floor Planning power/clock distribution Timing Closure multiple power domain analysis Testchip Logic design fundamentals Clock Tree Synthesis static timing analysis Python Perl Tcl

5 months ago

E-core CPU Physical Design Engineer

Permanent Job

Penang ,

Malaysia

0-5 years

5 months ago

E-core CPU Physical Design Engineer

Permanent Job

Penang ,

Malaysia

0-5 years

5 months ago

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Timing Closure Jobs

STA/PnR/InR/Synthesis Engineer

Design Enablement Testchip Physical Design Graduate Trainee

Software Development Engineer

E-core CPU Senior Physical Design Engineer

Physical Design Engineer

E-core CPU Physical Design Engineer

E-core CPU Physical Design Engineer