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45
Design Verification Jobs
Associate III - VLSI (DFT)
UST Global
Permanent Job
Bayan
,
Malaysia
0-2 years
AHB/AXI/PCIe/USB/Ethernet/SPI/I2C
Simulators
checklists
scan timing checks
FinFet
Mentor
Uvm
CMOS
Calibre
Analog Layout
Physical Verification
CDC/RDC
problem-solving skills
PT/Tempus
Communication Skills
design life-cycle process
ETS/TK/FS
Floorplan
Analytical Reasoning
Synopsys
LINT
Circuit Design
Sta
DC/RTL-C
ICC/Innovus/Olympus
Attention To Details
Cadence
Microprocessor architecture
FDSOI
Synthesis
Dft
VHDL
Extraction
Validation
Processor Hardening
Assembly
MBIST generation
Spice
Soft / Hard / Mixed Signal IP Design
ATPG test pattern generation
Physical Design
DFT Implementation
Clocks
P&R
C
Makefile
System Verilog
FPGA Design
C++
Verilog
TCL/TK
Templates
Perl
30 days ago
Manager, IC Design (MNC Semiconductor Company)
BTC Recruitment Malaysia - Executive Search Recruitment Agency
Permanent Job
Penang
,
Bayan
,
Malaysia
3-10 years
IC design
analoguemixedsignal
trade secrets
People Management
Verification
Patents
Communication Skills
a month ago
Project Manager
SMEC
Permanent Job
Petaling Jaya
,
Malaysia
20-22 years
Project Management
Budget
Marketing Activities
Financial Performance
Codes Of Practice
Proposal Preparations
Sub-Contracts
Hydropower
Standards
Client Relationships
Invoicing
Sub-Consultants
legal requirements
Privacy Legislation
Business Development
Equal Employment Opportunity
Safety
Rehabilitation
Communications Management
Audits
Human Resource Management
Verification
Construction Site Supervision
Contract Documentation
Dam Projects
Tender Design
detail design
English
Revenue Collection
Occupational Health
Workplace Diversity
Qa
a month ago
Process Controls Engineer
Air Products Malaysia Sdn
Permanent Job
Malaysia
,
Kuala Lumpur
5-7 years
validation report
cross function detail design
Control System Design Objectives
Iec
Technical Risk statement
PID
safety shutdown systems
Dcs
alarm management system
SIS/GDS
Instrumentation
engineering design
project bidding
SIL verification
Control System
human machine interfaces
30 days ago
Physical Design Engineer
LanceSoft, Inc.
Permanent Job
Penang
,
Malaysia
0-2 years
FinFET
ICC2
RTL
Synopsys Fusion Compiler
circuit/logic simulation
Optimization
STA signoff
Block P&R
Physical Verification
architecture
Dual Patterning nodes
tools for logic synthesis
Apache Redhawk
floorplanning
Versatility with scripts to automate design flow
physical/timing/electrical quality
Place And Route
familiarity with tools for schematics
Layout
automated synthesis
establishing design methodology
Pd
scan stitching
feed-thru planning
Identify complex technical problems
checks for logic equivalence
Floorplan
Clock Tree Synthesis
computer organization
high speed datapath
Design Compiler
primetime
final signoff for large IP delivery
IP integration
Cadence Genus
Innovus
Synthesis
Gds
StarRC
Placement
clock and power gating techniques
Full Chip Level Floor planning
Clock Tree Synthesis
design checks for physical and electrical quality
Bus / Pin Planning
Mentor Graphics Calibre
Timing Analysis
Parasitic Extraction
design cycle time reduction
drive and hands-on flow development and scripting
Physical Design
timing driven place and route
design optimization
control logic applications
PNR tools
perl
Static Timing Analysis
Routing
Unix
Python
clocking
Constraints
Shell
Linux
Tcl
a month ago
Design Enablement Testchip Physical Design Graduate Trainee
Intel Corporation
Permanent Job
Penang
,
Malaysia
0-2 years
physical design methodologies
electrical rule checking
formal equivalence verification
Reliability
physical clock design
layout verification
static and dynamic power integrity
Dft
EDA Tools
product-level parameters
Synthesis
coverage analysis
structural design checking
optimizes design
Place And Route
power and noise analysis
flow automation
Floor Planning
power/clock distribution
Timing Closure
multiple power domain analysis
Clock Tree Synthesis
static timing analysis
Python
Perl
Tcl
5 months ago
Senior Staff Engineer Analog Design (MNC Semiconductor)
BTC Recruitment Malaysia - Executive Search Recruitment Agency
Permanent Job
Penang
,
Bayan
,
Malaysia
5-7 years
submicron technology
layout planning
Leadership
Design Architecture
Verification
semiconductor technology
Analog Design
Problem Solving Skills
Mixed Signal circuitry design
Mixed Signal
Communication Skills
4 months ago
Lead Full Chip Implementation Engineer (MNC Software Development Company)
BTC Recruitment Malaysia - Executive Search Recruitment Agency
Permanent Job
Penang
,
Bayan
,
Malaysia
7-9 years
ASIC flow
full chip signoff verification
floorplanning
Digital Design
Scripting
5 months ago
Test Chip Engineering Manager
Intel Corporation
Permanent Job
Penang
,
Malaysia
5-10 years
Physical Design
fill code
LVS
Routing code
gpds
Calibre
python OA
ICV
layout editing
Extraction
verification CAD tools
Skill
automation
programming
Gui Development
5 months ago
Layout Design Technical Manager
Intel Corporation
Permanent Job
Penang
,
Malaysia
2-4 years
mentorship
layout automation
Tools
Digital Design
compilers
Memory Design
Layout Design
memory layout design
Verification
lv flows
standard cell layout methodologies
Analog Design
Flows
Scripting
5 months ago
E-core CPU Senior Physical Design Engineer
Intel Corporation
Permanent Job
Penang
,
Malaysia
0-8 years
APR flows
primetime
Noise
Fusion Compiler
cross-talk
ICC2
Conformal
Physical Design
electro-migration checks
Calibre
Synthesis
Layout physical design
Formal equivalence
redhawk
Dce
StarRCXT
Ir
DRC/LVS
OCV analysis
Timing Verification
Timing Closure
DCT
ICV
Cpu
Soc
Tcl Scripting
5 months ago
Physical Design Engineer
Intel Corporation
Permanent Job
Penang
,
Malaysia
5-7 years
Logic Synthesis
Reliability
RTL
physical clock design
Physical Design
Dft
ASIC
Gds
EDA Tools
Structural Design
automated place and route tools
Synthesis
coverage analysis
VLSI circuits
Place And Route
power and noise analysis
design techniques
Logic equivalent verification debugging
sub-micron CMOS technologies
Floor Planning
power/clock distribution
Timing Closure
multiple power domain analysis
Testchip
Logic design fundamentals
Clock Tree Synthesis
static timing analysis
Python
Perl
Tcl
5 months ago
Layout Design Engineer
Intel Corporation
Permanent Job
Penang
,
Malaysia
2-4 years
analog blocks
custom autorouters
custom placers
memory layout floorplan
memory layout design
digital block synthesis
layout verification
layout automation
5 months ago
PDK Development Graduate Trainee
Intel Corporation
Permanent Job
Penang
,
Malaysia
0-2 years
layout verification software
Layout of analog
LVS
test-cases development
parasitic
2D and 3D electromagnetic packages
validation of Process Design Kit (PDK) collaterals
Extraction runset and flow development
Automation Software
Technology file development
popular extraction solutions
industry standard CAD tools
analysis of CAD tool results
CAD
Custom Layout tools
interconnects
Digital Circuits
rc extraction
electromagnetic packages
Rf
DRC
QA plans
solvers
schematic entry
Unix
Eda
Python
Analog
Perl
Linux
Tcl
5 months ago
E-core CPU Physical Design Engineer
Intel Corporation
Permanent Job
Penang
,
Malaysia
0-5 years
APR flows
primetime
Noise
Fusion Compiler
cross-talk
ICC2
Conformal
Physical Design
electro-migration checks
Calibre
Synthesis
Layout physical design
Formal equivalence
redhawk
Dce
StarRCXT
Ir
DRC/LVS
OCV analysis
Timing Verification
Timing Closure
DCT
ICV
Cpu
Soc
Tcl Scripting
5 months ago
Layout Design Technical Manager
Intel Corporation
Permanent Job
Penang
,
Malaysia
2-4 years
mentorship
layout automation
Tools
Digital Design
compilers
Memory Design
Layout Design
memory layout design
Verification
lv flows
standard cell layout methodologies
Analog Design
Flows
Scripting
5 months ago
AMS Design Flow Engineer
Intel Corporation
Permanent Job
Penang
,
Malaysia
4-6 years
Skill
Physical Verification
Physical Design
Shell scripting language
advanced technology nodes
Design Automation
CAD layout tools
analog design principles
layout guidelines
Standard Cell Layout
Perl
Python
Tcl
5 months ago
E-core CPU Physical Design Engineer
Intel Corporation
Permanent Job
Penang
,
Malaysia
0-5 years
APR flows
primetime
Noise
Fusion Compiler
cross-talk
ICC2
Conformal
Physical Design
electro-migration checks
Calibre
Synthesis
Layout physical design
Formal equivalence
redhawk
Dce
StarRCXT
Ir
DRC/LVS
OCV analysis
Timing Verification
Timing Closure
DCT
ICV
Cpu
Soc
Tcl Scripting
5 months ago
Software Development Engineer
Lattice Semiconductor
Permanent Job
Penang
,
Malaysia
8-10 years
FPGA tool
Serdes interface
FPGA RTL design
testbench development
FPGA architecture
System Design Development
Logic Verification
Timing Closure
C/C++
Memory DDR
Perl
Pcie
Debugging
Ethernet
Python
Tcl
5 months ago
Analog Circuit Design Engineer
UST Malaysia
Permanent Job
Penang
,
Malaysia
8-10 years
Ring Oscillator
Bandgap Reference
LU
Verification
Analog Circuit Design
Esd
LDO
Cadence Virtuoso circuit design suite
OTA
Charge Pump
TSMC FinFet technologies
power-performance trade-offs
4 months ago
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