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Job Duties:
Work with global Front-End design team and Physical Design team for large scale ASIC chip physical implementation. Focus on physical design of deep sub-micron GPU chips including block level (full chip) floor planning, timing closure, place & route, physical verification etc.
Bachelor's degree in Electronics Engineering or equivalent.
2-10 years experience.
Knowledgeable in all aspects of deep submicron ASIC design flow.
Knowledgeable in Static Timing Analysis, Power Analysis and Physical Verification.
Good English written and communication skill.
Dedicated and Good team player.
Familiar with Back-End (physical design) EDA tools.
Familiar with Front-End EDA tools is a plus. Familiar with Unix/Linux environment and good at scripting.
The scope involved full GDS2RTL APR flow.
You will be enhancing your skills in floorplanning (100+srams), CTS & timing (3GHz+ design) and congestion management (60% post-floorplan utilisation).
About Quest Global Quest Global has emerged as one of the fastest growing technology services companies in the world. Quest Global assist its clients in developing their next generation flagship product lines (mobile devices, complex routers/switches, consumer products, storage, microprocessor, graphics processors etc.), this includes developing cutting edge technology that are key and rare in the industry. Experts in building the most complex SoC's, Quest Global further differentiates by having one of the strongest analog & firmware design teams in the industry.
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Date Posted: 30/07/2024
Job ID: 86927231